14 nm development kit released

Imec has released an early-version PDK (process development kit) for 14 nm logic chips, claimed to be the first to address the 14 nm technology node. It targets the introduction of a number of new key technologies, such as FinFET and EUV lithography.

The PDK will be followed by incremental updates. Imec and its partners are developing a 14 nm test chip to be released in the second half of 2012 using this PDK.

In addition, the PDK anticipates the introduction of a number of new technologies at the 14 nm node. The main example is the use of FinFET transistors, which have a larger drive per unit footprint and higher performance at low supply voltages compared to the traditional planar technologies.

Evolutions of this PDK will gradually introduce the use of high-mobility channel materials.

The PDK includes elements of both immersion and EUV lithography, opening the way for a gradual transition from 193 nm immersion to EUV lithography. This first 14 nm PDK contains all elements for design assessment of the 14 nm node through device compact models, parasitic extraction, design rules, parameterised cells (pcells) and basic logic cells.

Imec and its partners are now designing a first test chip which will allow testing the device, interconnect, process and litho assumptions, as well as performance and power of circuits implemented at the tight area budgets of the 14 nm node.