CompactPCI Plus standard can enhance data transfer

Dominion Electronics
Friday, 04 December, 2009


By: Manfred Schmitz, MEN Mikro Elektronik, Roland Nuiten, 3M Deutschland GmbH

One unfortunate side-effect of technological advancements is that they often force end users to accept an 'all-or-nothing' choice between a major investment in enhanced speed and capability, or live with less-than-optimum performance to protect the investment in an installed technology base.

At best, there's the troublesome option of supporting two technologies in tandem for a time as newer equipment gradually replaces older hardware.

But for the many embedded system users who rely on the CompactPCI interface, there's good news on the horizon in the form of new CompactPCI Plus standards currently proposed or in development by a PICMG subcommittee of more than 20 participating companies.

That effort is developing two distinct standards to allow users true choices on how to make a smooth transition to improved, yet 100% compatible, extensions of well-established CompactPCI standards.

The focus of the effort is to replace the limitations of the older CompactPCI parallel bus architecture with the greater flexibility of serial point-to-point connections, while establishing consistency in pin assignments to ensure hardware compatibility among modular boards and backplanes from various manufacturers.

The resulting standards will serve the needs of existing CompactPCI system users by allowing them to benefit from incorporating the new interface enhancements into existing applications and to streamline development of new applications that don't need to integrate with existing CompactPCI hardware.

A new plus for CompactPCI system designers

Unlike other serial transmission structures that use more complex switched fabrics for I/O, CompactPCI Plus uses a star topology connected by serial point-to-point connections. The system slot is the centre of the star and each peripheral board is a symmetrical point.

This simple and inexpensive approach, available in both commercial and rugged designs, offers flexible high-speed performance without the higher costs of switched fabric technologies. And it provides built-in compatibility for multiple interface formats associated with a variety of popular peripheral functions, such as:

  • PCI Express interfaces for connecting close peripheral devices;
  • SATA/SAS interfaces for mass storage devices like hard disks and hard-drive RAIDs;
  • USB interfaces for Wi-Fi components and loosely coupled peripheral devices like keyboards, touch screens and external hard disks;
  • Ethernet interfaces for traditional network technology as well as for multiprocessing and as a fieldbus for decentralised I/O.

The new peripheral slot and connector have been defined for differential signals with fast data rates of at least 10 Gbps to support next-generation serial buses like SATA 3.0, PCIe 2.0, 10GBaseT ethernet and USB 3.0.

In all cases, the mechanics are IEC 1101-compliant and fully compliant to the PICMG 2.0 CompactPCI standard. The dimensions of backplanes and boards are identical to PICMG 2.0, as are the front panels and the hot-plug mechanics.

Addressing application needs - old and new

The CompactPCI Plus interface promises higher computing performance for robust applications while maintaining 100% compatibility between older and newer platforms. While the end result is common, there are two separate standards to bring it to fruition for different application scenarios.

  • PICMG 2.30 CompactPCI PlusIO - This is a supplement to the PICMG 2.0 standard and provides guidelines for a migration path to upgrade existing parallel CompactPCI hardware to serial CompactPCI Plus performance. (Figure 1.)

Figure 1: The PICMG 2.30 CompactPCI PlusIO standard allows for existing CompactPCI applications to be modified to accommodate more powerful applications by using a hybrid system card that can communicate with existing CompactPCI peripherals as well as with four high-speed serial CompactPCI Plus peripherals.

It defines the functions of user pins on a modified J2 connector for backplane I/O signals of the serial high-speed interconnects. And it introduces a fully compliant high-speed connector capable of using all backplane I/O pins for high-speed signals without adding additional ground pins.

With a dual-slot CPU, it is possible to use the new system slot to build a hybrid system. And with a suitable hybrid backplane, both CompactPCI and CompactPCI Plus boards can be run in the same system. (Figure 2.)

Figure 2: For PCI Express, SATA/SAS or USB peripheral communications, the PICMG CPlus.0 CompactPCI Plus star topology permits one system slot to control up to eight peripheral slots - one of which is a dedicated PCIe 'Fat Pipe' for high-end applications.

This will allow applications to take advantage of an investment in existing I/O boards wherever practical, while allocating functions with higher data transfer rates to the newer CompactPCI Plus boards.

The working group finalised the initial draft of the PICMG 2.30 CompactPCI PlusIO standard at the end of 2008 and that standard is currently under review for final approval. As proposed, the standard allows for up to four new serial interfaces to be added to an existing CompactPCI installation.

  • PICMG CPlus.0 CompactPCI Plus - Also currently in development , this standard is for building entirely new applications and offers obvious performance advantages for end-use applications where there is no need to interface with existing CompactPCI hardware.

The system slot allows up to eight additional peripheral interfaces to be added without the need for additional switches or bridges. (Figure 3.) And it specifically supports full-mesh ethernet connections for a primary board and eight additional boards to allow for symmetrical multiprocessing and redundant system applications.

Figure 3: For ethernet applications under the PICMG CPlus.0 CompactPCI Plus standard, up to nine boards can be fully meshed with no bridges, switched fabrics or special backplanes required, and be optimised for symmetrical multiprocessing and redundant system performance.

The standard also defines ground pins between the signal pins, following a dedicated pattern, so there are no special ground pins in the connector.

Making the connection to higher performance

Two of the performance enhancements in the new CompactPCI Plus standards revolve around the capabilities of newly specified connectors capable of handling the upgraded speed and performance.

For PICMG 2.30 CompactPCI PlusIO applications, the challenge was to find a connector that was mechanically compatible with the original CompactPCI 2-mm hard-metric (HM) connector, yet could satisfy the transmission speeds required by the modern serial interfaces.

The selected solution is a 3M ultra hard metric (UHM) connector with virtual coaxial box shielding technology that reduces the crosstalk commonly experienced at 1.0 to 1.5 Gbps speeds in current CompactPCI installations.

In fact, the new connector is rated for speeds of 7 Gbps even when mated with the standard unshielded 2 mm hard-metric headers. (Figure 4A.) This new connector makes PCI Express, SATA, USB and ethernet available on the backplane alongside the legacy CompactPCI bus.

For PICMG CPlus.0 CompactPCI Plus applications, the design of FCI's AirMax VS connector system, which supports data transfer rates of up to 12 Gbps, is the proposed backplane connector standard. (Figure 4B.) The shieldless high-speed connector consists of insert moulded leadframe assemblies mounted at a pitch of 2 mm. This format offers up to 184 pin pairs on a 3U board.

Figures 4A (3M UHM connector)

4B (FCI AirMax connector)

Connectors for the two new CompactPCI Plus specifications - the 3M Ultra Hard Metric connector for PICMG 2.30 CompactPCI PlusIO (Figure 4A) and the FCI AirMax Connector for PICMG CPlus.0 CompactPCI Plus (Figure 4B) -  provide high-speed performance without crosstalk.

In the PICMG CPlus.0 CompactPCI Plus specification, the receptacles are mounted on the backplane and the pins on the plug-in cards. This arrangement is more robust than the legacy CompactPCI design, minimising potential damage due to bent pins when inserting cards into the backplane. And in the event of a connector pin failure, it is not necessary to remove and replace the entire backplane, but only to replace the individual plug-in card.

Forward-looking options for forward-thinking designers

With the expanded capabilities of the new standards, plus the historic advantages of CompactPCI systems, the attractiveness of this new technology is designed to appeal to the needs of both demanding applications and cost-conscious environments.

  • Robustness. Multiple features of the CompactPCI Plus format - a plug-in concept on a passive backplane, a small format and the shock-resistant/vibration-resistant design of a traditional 19-inch chassis offering multiple options for effective convection and conduction cooling - make it a well-positioned option for industrial, mobile and harsh environment applications.
  • Scalability. Opportunities to add new boards as computing or I/O requirements increase provide solutions for applications with fluctuating demands.
  • Minimised risk. The power to build complex clusters and redundant systems provides the confidence for safety-critical control system applications such as nuclear power stations, medical equipment, railway control and surveillance systems.
  • Convenient maintenance. The user-friendly modular design of the familiar 19-inch chassis and plug-in board format, complemented by hot-swap capability, provides quick maintenance in applications where extended downtime conditions are unacceptable.
  • Long-term availability. While not all individual manufacturers will guarantee availability of 10 years or more, the familiarity of the CompactPCI standards increases the likelihood of available, compatible off-the-shelf assemblies for system replacements or upgrades.

Enhanced applications on the horizon

New applications requiring considerably more bandwidth, storage capacity, data management capabilities and real-time functionality consistently place increased demands on embedded computing systems, especially as they go mobile in harsh environments. These include video surveillance, industrial automation, motor vehicle testing, diagnostics and human-machine interfaces.

Even in such demanding applications, versatile mezzanine cards for high-end graphics and communications supported by high-speed CompactPCI Plus technology delivered in a proved modular format create opportunities to make this interface an attractive option for leading-edge embedded system designers.

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