Full SiC performance in power modules: the tuning makes the difference

Semikron Pty Ltd

By Stefan Häuser
Tuesday, 03 July, 2018


Full SiC performance in power modules: the tuning makes the difference

Discrete devices such as the TO-247 are fine as a first step towards integrating silicon carbide into various applications, but for more powerful and sophisticated designs, the integration capabilities of power modules make them the first choice. But which packages are suitable for fast switching silicon carbide devices?

Silicon carbide can be the right semiconductor to choose when conventional silicon devices reach their limits in terms of power losses and switching frequency. Up to 30–40 kHz, the latest-generation silicon IGBTs and diodes combined with new topologies such as multilevel configuration provide the best cost-performance ratio. Hybrid silicon carbide, combining a high-speed silicon IGBT and a silicon carbide Schottky free-wheeling diode, is also a great option, reducing the power losses by up to 50% compared to silicon-only solutions.

Above 40 kHz, SiC MOSFETs can be the best choice, but lead to challenges for the power module and system design. Fast switching incurs steep current slopes and high di/dt values. The module’s and system’s parasitic inductances, LModule and LDC-Link, cause voltage drops due to this di/dt, resulting in voltage overshoot across the chips.

If the current slope is too high, this overvoltage might exceed the maximum blocking voltage, eg, 1200 V, of the SiC device. Decreasing the switching speed or the DC link voltage VDC-link will reduce the overvoltage but compromise the SiC power module’s performance. A module and system design focused on low commutation inductance is therefore essential.

Figure 1: Module and system inductance and their influence on transient overvoltage during MOSFET turn-off. For a larger image, click here.

The module’s commutation inductance is mainly provided by the DC bus terminals with 12 to 18 nH, depending on the power module design. The DBC design, ie, DBC tracks and wire bonds, contribute another 1 to 6 nH. The degree of optimisation freedom depends greatly on the overall power module design.

The SEMITRANS 3 module includes optimised DC bus terminals. Thanks to parallel guidance of the terminals internally, the commutation inductance of the complete package is 15 nH. This makes the SEMITRANS 3 good for medium- and high-power silicon carbide designs using medium switching speeds and frequencies up to approximately 25 kHz. Full SiC half-bridge topologies are available with rated currents of 350 and 500 A, with and without a SiC Schottky free-wheeling 1200 V diode.

Figure 2: SEMITRANS 3 DC bus terminals — parallel construction minimises stray inductance.

Another example is the MiniSKiiP, a baseplate-less power module using Semikron’s SPRiNG system to connect the power and auxiliary terminals to the PCB. Having spring positions fixed by the housing design, commutation inductance can only be improved within the limits of the DBC design. The resulting commutation inductance is around 20 nH for six-pack power modules, which allows full SiC modules for the low- and medium-power range. In full SiC MiniSKiiP is available with 25 to 90 A in six-pack topology for 1200 V and with 50, 100 and 150 A with hybrid SiC chipsets.

SEMITOP E2 is the baseplate-less module that allows full optimisation. With its pin-grid structure on the top of the housing, the press-fit pins can be freely distributed over the complete footprint. Extensive simulations helped to create a half-bridge design with only 6 nH commutation inductance. The module is equipped with six SiC MOSFETs in parallel, resulting in an RDS,on of 7.5 mΩ at 25°C.

Thanks to the design, the AC and DC sides are separated on opposite edges of the module, so the DC link PCB can be designed to be low-inductance as well. This means DC+ and DC– can remain paralleled within the PCB for a maximum distance, reducing the commutation loop.

Figure 3: SEMITOP E2 with its pin-grid structure.

The advantage of optimised commutation inductance is a safe operating area that supports switching speeds of over 50 kV/µs at 600 VDC link voltage, including a sufficient margin between the blocking voltage of the SiC MOSFET and the overvoltage measured across the MOSFET chips. Figure 4 shows the switching losses versus the drain current with an external gate resistor of 0.5Ω in addition to the internal gate resistor of 0.5Ω.

Figure 4: Switching losses of the SEMITOP E2 SiC versus the drain current ID.

The overall thermal performance of the power module is also important. The power density of silicon carbide chips is higher than that of silicon devices. SiC MOSFETs demonstrate significantly lower switching losses in general and especially lower voltage drops under partial load than silicon IGBTs with the same nominal current. This produces smaller chip areas under nominal load, with an undesirable higher thermal resistance from chip to baseplate or heatsink (Rth(j-c) resp. Rth(j-s)).

Yet the chip area might then not be sufficient for overload conditions. Due to the usually positive temperature coefficient of SiC devices, the static or forward losses gain importance and increase the overall losses during an overload. Adding additional SiC MOSFET chips to reduce the RDS,on would increase the overload capability, but also the cost of the power module. SiC is still expensive and only the minimum SiC chip area required should be used. The solution lies in improving the module’s thermal resistance.

Within a baseplate power module, the ceramic substrate that electrically insulates the module to the heatsink represents the biggest share of overall thermal resistance. Today, numerous materials exhibiting different mechanical and thermal behaviour are available. Table 1 gives an overview of the most commonly used materials: aluminium oxide (Al2O3), silicon nitride (Si3N4) and aluminium nitride (AlN).

The standard today is aluminium oxide, providing a good trade-off between thermal/mechanical behaviour and cost. AlN has nine times the thermal conductivity of Al2O3, but is less mechanically stable. This weakness must be offset with increased thickness, which compromises thermal improvement.

Si3N4 has 3.5 times the thermal conductivity of Al2O3 but has the best mechanical specifications. This material is therefore used in thinner layers, which compensates for the lower thermal conductivity and produces a similar thermal performance to AlN. Table 1 shows an overview of the three materials, summarising their thermal performance and mechanical robustness.

Ceramic substrate material Al2O3 Si3N4 AlN
Thermal conductivity (W/mK) ~25 ~90 ~180
Standard thickness (mm) 0.38 0.32 0.63
Resulting thermal performance 100% ~400% ~400%
Bending strength (MPa) 450 650 320
Fracture toughness (MPa/√m) 3.8–4.2 6.5–7 2.6
Mechanical robustness o + -

Table 1: Mechanical and thermal specifications of different ceramic substrates.

Table 2 shows a case study for the SEMITRANS 3 full SiC half-bridge power module. Available with Al2O3 and AlN substrates, the benefit of a substrate with increased thermal performance is obvious. The Al2O3 version uses 12 chips per switch at 100% module cost to achieve a continuous drain current of 431 A. If the substrate is changed to AlN and the chips reduced to eight, the continuous drain current remains in the same range while the cost of the power module is reduced to 75%.

  SEMITRANS 3 Full SiC
Al2O3
SEMITRANS 3 Full SiC
AlN
No. of chips per switch 12 8
Used chip area 100% 66%
Rth(j-c) per chip 0.84 K/W 0.54 K/W
Cont. drain current ID
(Tj=175°C/Tc=80°C)
431 A 416 A
Module cost 100% 75%

Table 2: SEMITRANS 3 full SiC case study.

Replacing time-consuming production processes with TO device-based power designs is only possible using silicon or silicon carbide power modules. The specific features of SiC require optimisation of the commutation inductance and thermal performance. As a result, the cost-performance ratio can be improved and the advantages of SiC fully utilised to the application’s benefit.

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