Tri-Gate transistor set to storm industry

Intel Australia Pty Ltd
By
Friday, 10 June, 2011


Intel has announced what it calls a significant breakthrough in the evolution of the transistor, the microscopic building block of modern electronics.

For the first time since the invention of silicon transistors over 50 years ago, transistors using a three-dimensional structure will be put into high-volume manufacturing. The company will introduce a 3-D transistor design called Tri-Gate, first disclosed in 2002, into high-volume manufacturing at the 22 nm node in a chip codenamed ‘Ivy Bridge’.

The Tri-Gate transistors represent a fundamental departure from the two-dimensional planar transistor structure that has powered not only all computers, mobile phones and consumer electronics to date, but also the electronic controls within cars, spacecraft, household appliances, medical devices and virtually thousands of other everyday devices for decades.

“Scientists and engineers have once again reinvented the transistor, this time using the third dimension,” said Intel president and CEO Paul Otellini.

“Amazing, world-shaping devices will be created from this capability as we advance Moore’s Law into new realms.”

Scientists have long recognised the benefits of a 3-D structure for sustaining the pace of Moore’s Law as device dimensions become so small that physical laws become barriers to advancement.

The key to today’s breakthrough is the company’s ability to deploy its novel Tri-Gate transistor design into high-volume manufacturing, ushering in the next era of Moore’s Law and opening the door to a new generation of innovations across a broad spectrum of devices.

Moore’s Law states that roughly every two years transistor density will double, while increasing functionality and performance and decreasing costs. It has become the basic business model for the semiconductor industry for more than 40 years.

The Tri-Gate transistors enable chips to operate at lower voltage with lower leakage, providing a combination of improved performance and energy efficiency compared with previous state-of-the-art transistors.

The capabilities give chip designers the flexibility to choose transistors targeted for low power or high performance, depending on the application.

The 22 nm Tri-Gates provide up to a 37% performance increase at low voltage versus 32 nm planar transistors. This gain means that they are suitable for use in small handheld devices, which operate using less energy to ‘switch’ back and forth.

The transistors consume less than half the power when at the same performance as 2-D planar transistors on 32 nm chips.

“The performance gains and power savings are like nothing we’ve seen before,” said Mark Bohr, Intel senior fellow.

“This milestone is going further than simply keeping up with Moore’s Law. The low-voltage and low-power benefits far exceed what we typically see from one process generation to the next. It will give product designers the flexibility to make current devices smarter and new ones possible.”

Transistors continue to get smaller, cheaper and more energy efficient in accordance with Moore’s Law - named after Intel co-founder Gordon Moore. Because of this, the company has been able to innovate and integrate, adding more features and computing cores to each chip, increasing performance, and decreasing manufacturing cost per transistor.

Sustaining the progress of Moore’s Law becomes even more complex with the 22 nm generation. Anticipating this, company research scientists in 2002 invented what they called a Tri-Gate transistor, named for the three sides of the gate.

This latest announcement follows further years of development in coordinated research-development-manufacturing, and marks the implementation of this work for high-volume manufacturing.

The new transistors are a reinvention of the transistor. The traditional ‘flat’ two-dimensional planar gate is replaced with an incredibly thin three-dimensional silicon fin that rises up vertically from the silicon substrate.

Control of current is accomplished by implementing a gate on each of the three sides of the fin - two on each side and one across the top - rather than just one on top, as is the case with the 2-D planar transistor.

The additional control enables as much current flowing as possible when the transistor is ‘on’ (for performance), and as close to zero as possible when it is ‘off’ (to minimise power), and enables the transistor to switch very quickly between the two states (again, for performance).

Just as skyscrapers let urban planners optimise available space by building upward, the Tri-Gate structure provides a way to manage density. Since these fins are vertical, transistors can be packed closer together, a critical component to the technological and economic benefits of Moore’s Law.

For future generations, designers also have the ability to continue growing the height of the fins to get even more performance and energy-efficiency gains.

“For years we have seen limits to how small transistors can get,” said Moore. “This change in the basic structure is a truly revolutionary approach, and one that should allow Moore’s Law, and the historic pace of innovation, to continue.”

The new transistor will be implemented in the company’s upcoming manufacturing process, called the 22 nm node, in reference to the size of individual transistor features. More than six million 22 nm Tri-Gates could fit in the full stop at the end of this sentence.

The company has demonstrated what it claims is the world’s first 22 nm microprocessor, codenamed ‘Ivy Bridge’, working in a laptop, server and desktop computer. Ivy Bridge-based Core family processors will be the first high-volume chips to use the Tri-Gate transistors and Ivy Bridge is planned for high-volume production readiness by the end of this year.

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