Silicon III-V chips could be commercially manufactured


Monday, 11 November, 2019


Silicon III-V chips could be commercially manufactured

The Singapore-MIT Alliance for Research and Technology (SMART), MIT’s research enterprise in Singapore, has announced a commercially viable way to manufacture integrated Silicon III-V chips with high-performance III-V devices inserted into their design.

In most devices today, silicon-based CMOS chips are used for computing, but they are not efficient for illumination and communications, resulting in low efficiency and heat generation. This is why current 5G mobile devices on the market get very hot upon use and tend to shut down after a short time.

This is where III-V semiconductors are valuable. III-V chips are made from elements in the third and fifth columns of the periodic table, such as gallium nitride (GaN) and indium gallium arsenide (InGaAs). Due to their unique properties, they are well suited to optoelectronics (LEDs) and communications (5G), boosting efficiency substantially.

“However, integrating III-V semiconductor devices with silicon in a commercially viable way is one of the most difficult challenges faced by the semiconductor industry, even though such integrated circuits have been desired for decades,” noted Kenneth Lee, Senior Scientific Director of the SMART LEES research program.

“Current methods are expensive and inefficient, which is delaying the availability of the chips the industry needs. With our new process, we can leverage existing capabilities to manufacture these new integrated Silicon III-V chips cost-effectively and accelerate the development and adoption of new technologies that will power economies.”

The SMART technology builds two layers of silicon and III-V devices on separate substrates and integrates them vertically together within a micron, which is 1/50th the diameter of a human hair. The process can use existing 200 mm manufacturing tools, which will allow semiconductor manufacturers in Singapore and around the world to make new use of their current equipment. Today, the cost of investing in a new manufacturing technology is in the range of tens of billions of dollars; the new integrated circuit platform is thus highly cost-effective and will result in much lower cost novel circuits and electronic systems.

“By integrating III-V into silicon, we can build upon existing manufacturing capabilities and low-cost volume production techniques of silicon and include the unique optical and electronic functionality of III-V technology,” said SMART CEO and Director Eugene Fitzgerald. “The new chips will be at the heart of future product innovation and power the next generation of communications devices, wearables and displays.”

SMART is now focusing on creating new chips for pixelated illumination/display and 5G markets, which has a combined potential market of over US$100 billion. Other markets that SMART’s new integrated Silicon III-V chips will disrupt include wearable mini-displays, virtual reality applications and other imaging technologies.

The patent portfolio has been exclusively licensed by New Silicon Corporation (NSC), a Singapore-based spin-off from SMART. The integrated Silicon III-V chips will be available next year and expected in products by 2021.

Image caption: A LEES researcher reviews a 200 mm Silicon III-V wafer.

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