Crystek’s CPLL66-2416-2553 PLL/synthesiser

Tuesday, 20 October, 2009 | Supplied by: Wireless Components


Crystek’s CPLL66-2416-2553 PLL/synthesiser operates from 2416 to 2553 MHz with a typical step size of 100 kHz. The CPLL66-2416-2553 is housed in an SMD package.

The construction wraps a VCO round a PLL in a package that’s only marginally larger than a VCO on its own and smaller than separate VCO/PLL modules.

The device is a complete PLL/synthesiser needing only an external frequency reference and supply voltages for the internal PLL and VCO. It is programmed using a standard three-line interface (data, clock and load enable).

Typical phase noise is -90 dBc/Hz at 10 kHz offset with minimum output power of 3 dBm. VCO voltage is 5 VDC; PLL voltage is 3 VDC; second harmonic suppression is -15 dBc typical.

Online: www.wirelesscomponents.com.au
Phone: 02 8883 4670
Related Products

Acromag XVME-6800 single board computer

The new XVME-6800 single board computer combines Intel Xeon W processing, high-speed connectivity...

Acromag QMC470 TTL Digital I/O Module

The QMC470 TTL Digital I/O Module provides high-density digital interfacing for embedded...

Metromatics WOLF 3U VPX GPU embedded computing module

The WOLF 3U VPX GPU high-performance embedded computing module is designed to deliver accelerated...


  • All content Copyright © 2026 Westwick-Farrow Pty Ltd