ISO26262 compliance for automotive ICs and semiconductor devices
Released in 2011, the ISO26262 standard is the major global regulation governing functional safety in road vehicles. A growing number of safety-critical systems under development in the automotive industry comply with this standard.
The severity of a possible failure in an automotive system leads to the assignment of an Automotive Safety Integrity Level (ASIL) to that system of either level A, B, C or D, with D being the most critical. The ASIL, in turn, demands a maximum failure rate and a minimum percentage of “safe” failures with respect to all failures in the system’s operation. To ensure a high share of safe failures of the semiconductor devices present in the automotive system, the implementation of safety and diagnostic functions is required. The standard also provides a framework for the validation and documentation of the safety features implemented.
Typical device applications are: electric power steering, pedal and position sensors. Functional safety-related design activities lead to a large portfolio of advanced-diagnostic IP such as:
- Continuous integrity checks of on-chip-memory
- Self-testing of the signal processing blocks
- Read-back of the status of device drivers and outputs
Originally the adoption of the ISO standard initially gave rise to major concerns about an increase in development costs and device die sizes within the semiconductor industry. Today the standard is regarded as a critical tool to aid the design-in of safety requirements in a more analytical, structured and disciplined manner.
Bernd Gessner, Vice President and General Manager of the automotive business unit at ams AG, said: “The rigorous analysis required for compliance with ISO26262 uncovered new ways in which ams could raise the reliability of its devices to an even higher level. ISO26262 has, in our view, become a critical extension of the safety regime governing automotive components and modules.”
The FMEDA (failure mode effect and detection analysis), in particular, has become a valuable and easy-to-use tool for IC designers. Using the decomposition method provided by the standard allows for the optimised allocation of safety features between the ICs and the host system, thus keeping the additional costs low.
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