Altera has unveiled technical details of its RISC-based Excalibur embedded processor cores for system-on-a-programmable-chip (SOPC) designs.
As part of its Excalibur product range, the XA and XM families provide unmodified embedded processor implementations of the ARM922T and the MIPS32 4Kc processors that run at 200 MHz, for Altera's APEX programmable logic architecture.
The XA and XM Excalibur embedded processor solutions offer the single-chip integration, high performance, and reprogrammability needed for a broad range of applications in the communications, computing, networking, digital consumer, information storage, and industrial markets.
The XA family is based on the ARM922T core, incorporating the Thumb instruction set for both 16- and 32-bit systems.
This core includes a memory management unit and 8 KB instruction and data caches, embedded into a fully-diffused area of the device known as the 'stripe'.
In addition to the processor core and its caches, the stripe also contains up to 256 KB of SRAM and 128 KB of dual port RAM.
Other embedded features include an SDRAM/DDRAM controller, UART, an external bus interface (EBI) to flash and SRAM, watchdog timer, timer counter, interrupt controller, embedded trace/debug logic, and up to six phase-locked loops.
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