Anticipating and correcting faults in 'failsafe' chips

Wednesday, 23 January, 2019

Anticipating and correcting faults in 'failsafe' chips

Researchers from the Polytechnic University of Valencia (UPV) have developed an advanced method for the analysis and on-demand configuration of photonic circuits, which makes it possible to anticipate the possible faults a chip may suffer and reduce their impact in the design phase, before they become operational. Their study has been published in the journal Optica.

The work of the researchers, based at UPV’s Institute of Telecommunications and Multimedia Applications (iTEAM), is centred on generic-purpose photonic circuits. These circuits are able to provide multiple functions while using a single architecture, in a similar way to how microprocessors act in electronics.

“With the tools we have developed, we would simplify and optimise the manufacturing and performance of these chips,” said Professor José Capmany, a researcher at iTEAM’s Photonics Research Labs (PRL) and co-author on the study.

According to Prof Capmany, often faults occur within the components of the circuits, and end up affecting their final performance. He said the new technique “allows us to anticipate where the circuit will fail and, from there, to configure the other components to make up for these deficiencies, thus guaranteeing their maximum performance”.

All this is achieved in a way that is completely unnoticeable for the user, according to co-author and PRL postdoctoral researcher Daniel Pérez.

“The analysis method is relatively simple: each of the units of the circuit is configured and, by applying mathematical induction techniques, offers a diagnosis of how the circuit would behave in each of the ports,” Pérez said. “From this diagnosis, we can carry out the modifications that we believe are appropriate in the configuration. Furthermore, the method allows us to simulate larger circuits and validate their capabilities with current manufacturing techniques.”

Another advantage of the iTEAM development is the lower cost of the chips. According to Prof Capmany, “If you are able to optimise the circuit through software, then the manufacturing phase is not so demanding, which enables increased performance in the production of these devices.”

The work also serves as a step towards the design and manufacture of photonic circuits with artificial intelligence techniques. Pérez explained, “Thanks to this method, we can use machine learning algorithms to synthesise and design circuits. The current work being developed is the seed that needs an automatic learning method.”

The next challenge for the iTEAM researchers is to merge their hardware design for the circuits with the advanced algorithms that make it possible to to take advantage of the full potential of the integrated optics.

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