Semiconductor protection tips for 3-level topologies
Supplied by Semikron Pty Ltd on Monday, 21 October, 2019
3-level topologies are mainly used in UPS and solar applications due to their high efficiency and low harmonic distortion of the grid. Essential for the design of the driver is to limit the voltage at the IGBT and handling of short circuits.
This application note describes the control and protection of power semiconductors in 3-level NPC and TNPC topologies.
This application note describes the control and protection of power semiconductors in 3-level NPC and TNPC topologies.
Related White Papers
Practical EMI control in a power component design space
Learn how to mitigate noise to a great extent by design, using equipment commonly available in...
High-density, modular PDNs optimise mobile robot performance
High-density, modular PDNs optimise mobile robot...
[White paper] Optimising high-density power design: modular vs discrete
Learn about modular and discrete high-density...
