Semiconductor protection tips for 3-level topologies

Supplied by Semikron Pty Ltd on Monday, 21 October, 2019


3-level topologies are mainly used in UPS and solar applications due to their high efficiency and low harmonic distortion of the grid. Essential for the design of the driver is to limit the voltage at the IGBT and handling of short circuits.

This application note describes the control and protection of power semiconductors in 3-level NPC and TNPC topologies.

Related White Papers

State-of-the-art electronics: advancing design systems for the future

[White paper] Smarter tech by design — insights...

How 3D printable electronics can cut your costs

3D printing is opening the door to new levels of efficiency and innovation in prototypes,...

Your guide to the latest IGBT chip technology

Learn about how you can reduce your power losses and increase maximum output power and power...


  • All content Copyright © 2026 Westwick-Farrow Pty Ltd