Basics of MOSFETs Part 1

International Rectifier
By Vrej Barkhordarian, International Rectifier, El Segundo, Ca.
Sunday, 05 March, 2006


Discrete power MOSFETs employ semiconductor processing techniques that are similar to those of today's VLSI circuits, although the device geometry, voltage and current levels are significantly different from the design used in VLSI devices.

The metal oxide semiconductor field effect transistor (MOSFET) is based on the original field-effect transistor introduced in the '70s.

Figure 1 shows the device schematic, transfer characteristics and device symbol for a MOSFET. The invention of the power MOSFET was partly driven by the limitations of bipolar power junction transistors (BJTs) which, until recently, were the device of choice in power electronics applications.

Figure 1: Power MOSFET (a) schematic, (b) transfer characteristics, (c) device symbol.

Although it is not possible to define absolutely the operating boundaries of a power device, I will loosely refer to the power device as any device that can switch at least 1 A.

The bipolar power transistor is a current controlled device. A large base drive current as high as a fifth of the collector current is required to keep the device in the On state.

Also, higher reverse base drive currents are required to obtain fast turn-off.

Despite the very advanced state of manufacturability and lower costs of BJTs, these limitations have made the base drive circuit design more complicated and hence more expensive than the power MOSFET.

Another BJT limitation is that both electrons and holes contribute to conduction. Presence of holes with their higher carrier lifetime causes the switching speed to be several orders of magnitude slower than for a power MOSFET of similar size and voltage rating.

Also, BJTs suffer from thermal runaway. Their forward voltage drop decreases with increasing temperature causing diversion of current to a single device when several devices are paralleled.

Power MOSFETs, on the other hand, are majority carrier devices with no minority carrier injection. They are superior to the BJTs in high frequency applications where switching power losses are important.

They can also withstand simultaneous application of high current and voltage without undergoing destructive breakdown. Power MOSFETs can also be paralleled easily because the forward voltage drop increases with increasing temperature, ensuring an even distribution of current among all components.

However, at high breakdown voltages (greater than 200 V) the on-state voltage drop of the power MOSFET becomes higher than that of a similar size bipolar device with similar voltage rating. This makes it more attractive to use the bipolar power transistor at the expense of worse high frequency performance.

Figure 2 shows the present current-voltage limitations of power MOSFETs and BJTs. Over time, new materials, structures and processing techniques are expected to raise these limits.

Figure 2: Current-voltage limitations of MOSFETs and BJTs.

Figure 3 shows the schematic diagram and Figure 4 shows the physical origin of the parasitic components in an n-channel power MOSFET. The parasitic JFET appearing between the two body implants restricts current flow when the depletion widths of the two adjacent body diodes extend into the drift region with increasing drain voltage.

Figure 3: Schematic diagram for an n-channel power MOSFET and the device.

Figure 4: Power MOSFET parasitic components.

The parasitic BJT can make the device susceptible to unwanted device turn-on and premature breakdown. The base resistance RB must be minimised through careful design of the doping and distance under the source region. There are several parasitic capacitances associated with the power MOSFET as shown in Figure 3.

CGS is the capacitance due to the overlap of the source and the channel regions by the polysilicon gate and is independent of applied voltage. CGD consists of two parts, the first is the capacitance associated with the overlap of the polysilicon gate and the silicon underneath in the JFET region.

The second part is the capacitance associated with the depletion region immediately under the gate. CGD is a nonlinear function of voltage.

Finally, CDS, the capacitance associated with the body-drift diode, varies inversely with the square root of the drain-source bias.

There are currently two designs of power MOSFETs, usually referred to as the planar and the trench designs. The planar design has already been introduced in the schematic of Figure 3. Two variations of the trench power MOSFET are shown in Figure 5. The trench technology has the advantage of higher cell density but is more difficult to manufacture than the planar device.

Figure 5: Trench MOSFET (a) current crowding in V-groove trench MOSFET, (b)truncated V-groove MOSFET.

Breakdown voltage, BVDSS, is the voltage at which the reverse-biased body-drift diode breaks down and significant current starts to flow between the source and drain by the avalanche multiplication process, while the gate and source are shorted together.

Current-voltage characteristics of a power MOSFET are shown in Figure 6. BVDSS is normally measured at 250 µA drain current. For drain voltages below BVDSS and with no bias on the gate, no channel is formed under the gate at the surface and the drain voltage is entirely supported by the reverse-biased body-drift p-n junction.

Figure 6: Current-voltage characteristics of the power MOSFET.

Two related phenomena can occur in poorly designed and processed devices: punch-through and reach-through.

Punch-through is observed when the depletion region on the source side of the body-drift p-n junction reaches the source region at drain voltages below the rated avalanche voltage of the device.

This provides a current path between source and drain and causes soft breakdown characteristics as shown in Figure 7.

Figure 7: Power MOSFET breakdown characteristics.

The leakage current flowing between source and drain is denoted by IDSS. There are tradeoffs to be made between RDS(on) that require shorter channel lengths and punch-through avoidance that requires longer channel lengths.

(To be continued)

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